#include"stdafx.h"
#include "bochs.h"


/* ********************************************** */
/* SSE Integer Operations (128bit MMX extensions) */
/* ********************************************** */

/* 66 0F 63 */
void IA32_CPU::PACKSSWB_VdqWq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 64 */
void IA32_CPU::PCMPGTB_VdqWq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 65 */
void IA32_CPU::PCMPGTW_VdqWq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 66 */
void IA32_CPU::PCMPGTD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 67 */
void IA32_CPU::PACKUSWB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 6B */
void IA32_CPU::PACKSSDW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 74 */
void IA32_CPU::PCMPEQB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 75 */
void IA32_CPU::PCMPEQW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 76 */
void IA32_CPU::PCMPEQD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F C4 */
void IA32_CPU::PINSRW_VdqEdIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F C5 */
void IA32_CPU::PEXTRW_VdqEdIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D1 */
void IA32_CPU::PSRLW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D2 */
void IA32_CPU::PSRLD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D3 */
void IA32_CPU::PSRLQ_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D4 */
void IA32_CPU::PADDQ_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D5 */
void IA32_CPU::PMULLW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D7 */
void IA32_CPU::PMOVMSKB_GdVRdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D8 */
void IA32_CPU::PSUBUSB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F D9 */
void IA32_CPU::PSUBUSW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F DA */
void IA32_CPU::PMINUB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* ANDPS:    0F 54 */
/* ANDPD: 66 0F 54 */
/* PAND:  66 0F DB */

void IA32_CPU::PAND_VdqWdq(Ia32_Instruction_c *i)
{
   prepareSSE();

  Ia32PackedXmmRegister op1 = IA32_READ_XMM_REG(i->nnn()), op2;

  /* op2 is a register or memory reference */
  if (i->modC0()) {
    op2 = IA32_READ_XMM_REG(i->rm());
  }
  else {
    /* pointer, segment address pair */
    read_virtual_dqword_aligned(i->seg(), IA32_RMAddr(i), (Bit8u *) &op2);
  }

  op1.xmm64u(0) &= op2.xmm64u(0);
  op1.xmm64u(1) &= op2.xmm64u(1);

  /* now write result back to destination */
  IA32_WRITE_XMM_REG(i->nnn(), op1);
}

/* 66 0F DC */
void IA32_CPU::PADDUSB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F DD */
void IA32_CPU::PADDUSW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F DE */
void IA32_CPU::PMAXUB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* ANDNPS:    0F 55 */
/* ANDNPD: 66 0F 55 */
/* PANDN:  66 0F DF */

void IA32_CPU::PANDN_VdqWdq(Ia32_Instruction_c *i)
{
   prepareSSE();

  Ia32PackedXmmRegister op1 = IA32_READ_XMM_REG(i->nnn()), op2;

  /* op2 is a register or memory reference */
  if (i->modC0()) {
    op2 = IA32_READ_XMM_REG(i->rm());
  }
  else {
    /* pointer, segment address pair */
    read_virtual_dqword_aligned(i->seg(), IA32_RMAddr(i), (Bit8u *) &op2);
  }

  op1.xmm64u(0) = ~(op1.xmm64u(0)) & op2.xmm64u(0);
  op1.xmm64u(1) = ~(op1.xmm64u(1)) & op2.xmm64u(1);

  /* now write result back to destination */
  IA32_WRITE_XMM_REG(i->nnn(), op1);
}

/* 66 0F E0 */
void IA32_CPU::PAVGB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E1 */
void IA32_CPU::PSRAW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E2 */
void IA32_CPU::PSRAD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E3 */
void IA32_CPU::PAVGW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E4 */
void IA32_CPU::PMULHUW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E5 */
void IA32_CPU::PMULHW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E8 */
void IA32_CPU::PSUBSB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F E9 */
void IA32_CPU::PSUBSW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F EA */
void IA32_CPU::PMINSW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* ORPS:    0F 56 */
/* ORPD: 66 0F 56 */
/* POR:  66 0F EB */

void IA32_CPU::POR_VdqWdq(Ia32_Instruction_c *i)
{
   prepareSSE();
  Ia32PackedXmmRegister op1 = IA32_READ_XMM_REG(i->nnn()), op2;

  if (i->modC0()) 
  {
    op2 = IA32_READ_XMM_REG(i->rm());
  }
  else 
  {
    read_virtual_dqword_aligned(i->seg(), IA32_RMAddr(i), (Bit8u *) &op2);
  }

  op1.xmm64u(0) |= op2.xmm64u(0);
  op1.xmm64u(1) |= op2.xmm64u(1);

  IA32_WRITE_XMM_REG(i->nnn(), op1);
}

/* 66 0F EC */
void IA32_CPU::PADDSB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F ED */
void IA32_CPU::PADDSW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F EE */
void IA32_CPU::PMAXSW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* XORPS:    0F 57 */
/* XORPD: 66 0F 57 */
/* PXOR:  66 0F EF */

void IA32_CPU::PXOR_VdqWdq(Ia32_Instruction_c *i)
{
   prepareSSE();

  Ia32PackedXmmRegister op1 = IA32_READ_XMM_REG(i->nnn()), op2;

  if (i->modC0()) 
  {
    op2 = IA32_READ_XMM_REG(i->rm());
  }
  else 
  {
    read_virtual_dqword_aligned(i->seg(), IA32_RMAddr(i), (Bit8u *) &op2);
  }

  op1.xmm64u(0) ^= op2.xmm64u(0);
  op1.xmm64u(1) ^= op2.xmm64u(1);

  IA32_WRITE_XMM_REG(i->nnn(), op1);
}

/* 66 0F F1 */
void IA32_CPU::PSLLW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F2 */
void IA32_CPU::PSLLD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F3 */
void IA32_CPU::PSLLQ_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F4 */
void IA32_CPU::PMULUDQ_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F5 */
void IA32_CPU::PMADDWD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F6 */
void IA32_CPU::PSADBW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F8 */
void IA32_CPU::PSUBB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F F9 */
void IA32_CPU::PSUBW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F FA */
void IA32_CPU::PSUBD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F FB */
void IA32_CPU::PSUBQ_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F FC */
void IA32_CPU::PADDB_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F FD */
void IA32_CPU::PADDW_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F FE */
void IA32_CPU::PADDD_VdqWdq(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 71 Grp12 010 */
void IA32_CPU::PSRLW_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 0F 71 Grp12 100 */
void IA32_CPU::PSRAW_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 71 Grp12 110 */
void IA32_CPU::PSLLW_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 72 Grp13 010 */
void IA32_CPU::PSRLD_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 0F 72 Grp13 100 */
void IA32_CPU::PSRAD_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 72 Grp13 110 */
void IA32_CPU::PSLLD_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 73 Grp14 010 */
void IA32_CPU::PSRLQ_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

void IA32_CPU::PSRLDQ_WdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 73 Grp14 110 */
void IA32_CPU::PSLLQ_PdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}

/* 66 0F 73 Grp14 111 */
void IA32_CPU::PSLLDQ_WdqIb(Ia32_Instruction_c *i)
{
  UndefinedOpcode(i);
}
